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ISA Design Tradeoffs. We are designing an ISA based on MIPS with the following changes: the number of registers used is halved, but the opcode and instruction length remain the same. (a) What is the maximum and minimum value of the immediate value allowed in I-type instructions for signed two’s complement immediate values? (b) What is the maximum number of instructions a ‘branch’ is capable of branching forwards and backwards?
Expert Answer
Solution:
When the number of registers is halved and the number of bits for opcode and instruction is same
000000|0000|0000|000000000000000000
a) Max value= 131071 Mini Value= -131072; 4 digits for rs, 6 opcode digits, 18 bits for the immediate. 4 digits for rt.
b) Branch forward and backward instructions are going to be 511 and 512 respectively
Branch Forward Instructions= 511 Branch Backward Instructions= 512
