# Question & Answer: For the following two operations give the result and indicate the status of the C, V, N, and Z bits in the Condition Code register……

For the following two operations give the result and indicate the status of the C, V, N, and Z bits in the Condition Code register.

a) \$2A + \$52 = ?

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Question & Answer: For the following two operations give the result and indicate the status of the C, V, N, and Z bits in the Condition Code register……
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b) \$AC + \$8A = ?

Let’s know first when each bit is set i.e. its value is set to 1.

I am writing this for addition operation only..

Z bit is set if addition returns 0 here. i.e. Z = 1 when the result is 0.

C bit is set if a carry is produced by the addition.

N bit is set if the result is negative i.e. when the MSB – most significant bit in result comes 1, the number is said negative so N bit is set.

V bit is set when an overflow is occurred. This in simple terms means when you add 2 positive numbers and it produces a negative number; it is said an overflow.

Similarly, when you add 2 negative numbers and the result is positive number, it is also an overflow.

So, in general, overflow means when you add 2 numbers of same sign and the result produced is having different sign.

Let’s make it simpler. If both the numbers have 1 in MSB, and the result has 0 in MSB; or vice-versa, it is said an overflow.

So now let’s add the numbers and find the result and status of these bits.

(a).

\$2A
+ \$52
——
\$7C

Condition Code register status:

The result is not zero so Z flag remains 0.

No carry is produced here so C flag is also 0.

To see the MSB, write this number in binary.

7C = 0111 1100

So, here the MSB is not 1 so the number is positive. So N bit is also set to 0.

To find out the overflow…

Overflow is detected when the carry is generated while adding the respective 4 bits in binary. This means that you consider A+2 separate and if it is producing a carry, it will be added with 2+5. It is not generating a carry here, but if it was generated, it would be an overflow.

As here no overflow is there, V bit is also remaining 0.

(b).

\$AC
+ \$8A
——
\$36 and carry = 1.

Let’s find the condition register status..

Here, the carry flag is set because in result we get, A+8+1 is exceeding F, the maximum value so C = 1

Z bit is 0 as the result is non-zero.

The number in binary is : 36 = 00110110 so the MSB is 0.

So N bit is also 0.

Let’s find for the overflow bit.

1100 (C in binary)
+1010 (A in binary)
——
0110

See, here both the numbers having MSB 1 and result containing MSB 0.

So this is an overflow. So, V bit is set to 1.